California's (CA) Hardware Sensing Δ 7th of November 2018 Ω 10:35 AM

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~ U.S. Department of Energy’s Lawrence Berkeley National Laboratory ~ Tensilica ~ AMD	~ Intel ~ Kateeva ~ Sinovia Technologies	~ GetChip ~ Facebook ~ Movidius
~ JPL NASA ~ Palomar Displays ~ Cerebras Systems	~ Royole ~ sense for Ξ ~ sense for Ξ	~ sense for Ξ ~ sense for Ξ ~ sense for Ξ
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«U.S. Hardware Sensing	Θ	Θ
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~ U.S. Department of Energy’s Lawrence Berkeley National Laboratory

U.S. Department of Energy’s Lawrence Berkeley National Laboratory
ξ Three researchers from the U.S. Department of Energy’s Lawrence Berkeley National Laboratory (Berkeley Lab)
ξ have proposed an innovative way to improve global climate change predictions
ξ by using a supercomputer with low-power embedded microprocessors,
ξ an approach that would overcome limitations posed by today’s conventional supercomputers

ξ In a paper published in the May issue of the International Journal of High Performance Computing Applications,
ξ Michael Wehner and Lenny Oliker of Berkeley Lab’s Computational Research Division, and
ξ John Shalf of the National Energy Research Scientific Computing Center (NERSC)
ξ lay out the benefit of a new class of supercomputers for modeling climate conditions and understanding climate change.

ξ Using the embedded microprocessor technology used in cell phones, iPods, toaster ovens and most other modern day electronic conveniences,
ξ they propose designing a cost-effective machine for running these models and improving climate predictions

ξ In April, Berkeley Lab signed a collaboration agreement with Tensilica®, Inc.
ξ to explore such new design concepts for energy-efficient high-performance scientific computer systems
ξ The joint effort is focused on novel processor and systems architectures
ξ using large numbers of small processor cores,
ξ connected together with optimized links, and
ξ tuned to the requirements of highly-parallel applications such as climate modeling

ξ Understanding how human activity is changing global climate
ξ is one of the great scientific challenges of our time
ξ Scientists have tackled this issue by developing climate models that use the historical data of factors
ξ that shape the earth’s climate, such as rainfall, hurricanes, sea surface temperatures and carbon dioxide in the atmosphere
ξ One of the greatest challenges in creating these models, however, is to develop accurate cloud simulations

ξ Although cloud systems have been included in climate models in the past,
ξ they lack the details that could improve the accuracy of climate predictions
ξ Wehner, Oliker and Shalf set out to establish a practical estimate
ξ for building a supercomputer capable of creating climate models at 1-kilometer (km) scale
ξ A cloud system model at the 1-km scale would provide rich details that are not available from existing models

ξ To develop a 1-km cloud model,
ξ scientists would need a supercomputer
ξ that is 1,000 times more powerful than what is available today
ξ building a supercomputer powerful enough to tackle this problem is a huge challenge

ξ Historically, supercomputer makers build larger and more powerful systems by increasing the number of conventional microprocessors —
ξ usually the same kinds of microprocessors used to build personal computers
ξ Although feasible for building computers large enough to solve many scientific problems,
ξ using this approach to build a system capable of modeling clouds at a 1-km scale would cost about $1 billion
ξ The system also would require 200 megawatts of electricity to operate,
ξ enough energy to power a small city of 100,000 residents.

ξ In their paper, “Towards Ultra-High Resolution models of Climate and Weather,”
ξ the researchers present a radical alternative that would cost less to build and
ξ require less electricity to operate
ξ They conclude that a supercomputer using about 20 million embedded microprocessors
ξ would deliver the results and cost $75 million to construct
ξ This “climate computer” would consume less than 4 megawatts of power and
ξ achieve a peak performance of 200 petaflops

ξ “Without such a paradigm shift, power will ultimately limit the scale and performance of future supercomputing systems, and
ξ therefore fail to meet the demanding computational needs of important scientific challenges like the climate modeling,” Shalf said.

ξ The researchers arrive at their findings by extrapolating performance data from the Community Atmospheric Model (CAM)
ξ CAM, developed at the National Center for Atmospheric Research in Boulder, Colorado,
ξ is a series of global atmosphere models commonly used by weather and climate researchers

ξ The “climate computer” is not merely a concept
ξ Wehner, Oliker and Shalf, along with researchers from UC Berkeley,
ξ are working with scientists from Colorado State University to build a prototype system
ξ in order to run a new global atmospheric model developed at Colorado State

ξ “What we have demonstrated is that in the exascale computing regime,
ξ it makes more sense to target machine design for specific applications,”Wehner said.
ξ “It will be impractical from a cost and power perspective to build general-purpose machines like today’s supercomputers.”

ξ Under the agreement with Tensilica,
ξ the team will use Tensilica’s Xtensa LX extensible processor cores as the basic building blocks
ξ in a massively parallel system design
ξ Each processor will dissipate a few hundred milliwatts of power,
ξ yet deliver billions of floating point operations per second and
ξ be programmable using standard programming languages and tools
ξ This equates to an order-of-magnitude improvement in floating point operations per watt,
ξ compared to conventional desktop and server processor chips
ξ The small size and low power of these processors allows tight integration at the chip, board and rack level
ξ and scaling to millions of processors within a power budget of a few megawatts

ξ Berkeley Lab is a U.S. Department of Energy national laboratory located in Berkeley, California.
ξ It conducts unclassified scientific research and is managed by the University of California

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~ Tensilica

»Tensilica

Overview
ξ a privately held company incorporated in July 1997
ξ is known as the leader and major innovator in configurable processor technology,
ξ with multiple patents on its easy-to-use automated processor design systems
ξ that let designers quickly and accurately modify the processor and
ξ it's companion software development and system modeling tools with exactly the configuration options and application-specific instructions needed
ξ Tensilica’s processors are the engines in system-on-chip (SOC) designs
ξ Tensilica solutions allow designers to create lower power, higher performance hardware and software for their chip designs

Tensilica has two main product lines: the configurable Xtensa processors and the pre-configured Diamond Standard processors.

Tensilica’s unique Xtensa processors
ξ are designed for high volume, embedded applications
ξ Designers can configure and extend the processor to add memories, peripherals and special functions
ξ a complete software development environment is automatically created to match each new processor configuration
ξ Often design teams are able to replace their RTL designs with Xtensa processors,
ξ adding programmability and flexibility to their designs
ξ Tensilica also offers the XPRES Compiler,
ξ which automatically creates customized Xtensa processors from standard C/C++ algorithms

Tensilica’s Diamond Standard processors
ξ are a set of 10 off-the-shelf synthesizable cores that range from area-efficient,
ξ low-power controllers to audio and video processors and a high-performance DSP,
ξ all of which lead the industry in their respective categories both in lowest power and highest performance
ξ The Diamond Standard processors are supported by an optimized set of Diamond Standard software tools and
ξ a wide range of industry infrastructure partners
ξ They are available directly from Tensilica and through a growing list of ASIC and foundry partners

Technology

A Modern, Efficient Architecture
ξ All of Tensilica’s processors are based on the proven Xtensa architecture,
ξ which is used across a wide range of electronic products,
ξ from low-cost portable consumer applications
ξ to carrier-class networking routers
ξ Whether used as an efficient programmable controller or as an audio processor, high-performance DSP or high-speed processor,
ξ the Xtensa Instruction Set Architecture (ISA) is the ideal architecture for almost any application in any market.
ξ How can one architecture the "the best" for so many different markets?
ξ Because Tensilica essentially gives you the equivalent of a $15 million architectural license
ξ to modify its processors, plus patented, automated tools that assure that your modifications will be made properly.

ξ On top of that, Tensilica's tools automatically generate a complete, matching tool chain for any configuration or set of extensions.
ξ So you always have the software support you need that exactly matches your own processor.

ξ This lets you build in your own differentiation into your products.
ξ Your products will be harder for competitors to copy,
ξ since you're using your unique processor instead of an industry standard core that anyone can purchase.

ξ for a simple controller or DSP is Diamond Standard product line of Tensilica-optimized cores, built on the same foundation
ξ picked the configuration options and/or extended the processor themselves

A Superior Instruction Set Architecture
ξ The Xtensa Instruction Set Architecture (ISA)
ξ is a 32-bit RISC architecture
ξ featuring a compact instruction set optimized for embedded designs
ξ The architecture has:
ξ a 32-bit ALU;
ξ 16, 32 or 64 general-purpose physical registers;
ξ six special purpose registers; and
ξ 80 base instructions

ξ The Xtensa ISA employs 24-bit instructions with 16-bit narrow encodings for the most common instructions
ξ These 16-and 24-bit instruction words are freely intermixed to achieve higher code density without compromising application performance.
ξ On some processors, 64-bit VLIW encoding is utilized when efficient, and
ξ these 2- or 3-issue instructions are also modelessly intermixed with 16- and 24-bit instructions
ξ The Xtensa ISA thus optimizes the size of the program instructions by minimizing both the static number of instructions
ξ (the instructions that constitute the application program) and the average number of bits per instruction

ξ The use of 24- and 16-bit instruction words, the use of compound instructions,
ξ the richness of the comparison and bit-testing instructions,
ξ zero-overhead-loop instructions,
ξ register windowing, and
ξ the use of encoded immediate values
ξ all contribute to the Diamond processors’ small code size.
ξ Thus, the 24-/16-bit Diamond processor ISA enables designers to achieve 25% to 50% lower code size compared to conventional 32-/16-bit ISA-based RISC cores
ξ Reducing code size results in smaller memory sizes and lower power dissipation
ξ – key parameters in cost-sensitive, highly integrated SOC designs.

»Xtensa 7 Configurable Processor Core

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~ AMD

AMD Developers
ξ Username: dragonxi4amd Password: amd4dragonxi Remember: Tyyne

»Athlon 64 X2
ξ a dual-core desktop CPU consisting of two Athlon 64 cores joined together on one die with additional control logic
ξ cores share one dual-channel memory controller
ξ are based on the E-stepping model of Athlon 64 and, depending on the model, have either 512 or 1024 KiB of L2 Cache per core
ξ Athlon64 X2 is capable of decoding SSE3 instructions except those few specific to Intel's architecture

Thread-level parallelism
ξ the main benefit of dual-core processors like the X2 is their ability to process more software threads at the same time
ξ by placing two cores on the same die, the X2 effectively doubles the TLP over a single-core Athlon 64 of the same speed
ξ programs often written with multiple threads and capable of utilizing dual-cores include many music and video encoding applications,
ξ and especially professional rendering programs
ξ high TLP applications currently correspond to server/workstation situations more than the typical desktop
ξ these applications can realize almost twice the performance of a single-core Athlon 64 of the same specifications
ξ multi-tasking also runs a sizable number of threads;
ξ intense multi-tasking scenarios have actually shown improvements of considerably more than two times
ξ this is primarily due to the excessive overhead caused by constantly switching threads,
ξ and could potentially be improved by adjustments to operating system scheduling code

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~ Intel

»Intel

Edge computing with Movidius
ξ companies are starting to realize they need to put more processing power
ξ on devices at the edge of their networks to serve customers sensitive to those delays
ξ Movidius is capable of delivering 1 TFLOPS of performance in a small package
ξ designed to fit into mobile devices or other tight spaces inside factories or other industrial facilities

Movidius Myriad X vision processing unit (VPU)
ξ Intel claims is the world’s first system-on-chip shipping with a dedicated Neural Compute Engine
ξ for accelerating deep learning inferences at the edge
ξ SoC is specifically designed to run deep neural networks at high speed and low power
ξ without compromising accuracy, enabling devices to see, understand and respond to their environments in real time
ξ comes from Intel’s Movidius division, a company it bought to propel it into deep learning and AI
ξ Intel is aiming this technology at drones, VR/AR headsets, robotics and smart cameras,
ξ where the tiny, low-powered SoC can handle 4 trillion operations per second
ξ which translates into seemingly magical capabilities around image recognition and learned responses
ξ drone might be able to identify a child running out between two parked cars and
ξ instruct the car to take evasive action
ξ it could provide instant haptic/tactile feedback on distance surgery
ξ based on what it’s learned from similar slicings and dicings in the past

Intel to acquire Movidues which makes Visual Processing Units
ξ devices to be smart and connected <-- not systems!
ξ devices capable of understanding and responding to its environment <-- not network-centric!
ξ computer vision
ξ perceptual computing
ξ computer vision enabling machines to visually process and understand their surroundings
ξ cameras serve as the “eyes” of the device <-- only one!
ξ central processing unit seen as the “brain” <-- only one!
ξ vision processor to be the “visual cortex” <-- only one!
ξ computer vision enables navigation and mapping, collision avoidance ... <-- not enough!
ξ recognizing objects <-- camera not enough!
ξ understanding scenes <-- mission data!
ξ devices become smarter and more distributed <-- requires network-centric approach!

Movidues acquisition expected to bring
ξ algorithms tuned for deep learning
ξ depth processing
ξ navigation and mapping
ξ natural interactions
ξ expertise in embedded computer vision and machine intelligence<-- unlike Windows platforms!
ξ opportunities in areas where heat, battery life and form factors are key <-- unlike PCs powered by Intel!

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~ Kateeva

»Kateeva
aims to reduce the cost of making flexible and large-scale OLEDs
pioneered a new inkjet printing manufacturing equipment solution
that will enable such OLEDs to be produced over large areas and in high volume – with longer lifetimes, higher yields and lower costs
solves key manufacturing challenges that previously prevented the well-proven inkjet technique from scaling to perform reliable, high-volume OLED printing
for OLED producers of curved, bendable, and flexible displays, as well as large displays like 55” TVs, it’s a breakthrough
It represents the industry’s first economically viable and production-worthy technique to use printing for low-cost mass-production of OLED displays
founded in 2008 and headquartered in Silicon Valley the team is staffed by OLED, ink and printing experts,
as well as experienced semiconductor and FPD equipment executives
intends to put “Dream Displays”, with their incredible clarity, performance and low-power advantages, within affordable reach

OLED displays
are now a practical reality
prized for its performance and low-power advantages,
OLED is already the preferred display technology for smart phones, digital cameras and other mobile devices
by one estimate, mobile phone displays accounted for 71% of the US$4.9 billion 2012 OLED market
within five years, it’s expected that more than half of all new phone displays will be OLED-based

The next natural leap for OLEDs is flexible and large-scale displays.
55” OLED TVs debuted in the summer of 2013, fulfilling the promise of a spectacular viewing experience
—grander by far than LCDs—but with a steep price tag.
Cost notwithstanding, reviewers raved about truer-than-life color and
ultra-realistic image quality—made possible in part by the high contrast ratios enabled by OLED technology

Flexible OLED displays
unlike rigid OLED screens which are built on glass substrates,
flexible OLED technology uses plastic substrates which enables companies to manufacture paper-thin,
ultra-light products in a variety of shapes to suit the application purpose,
think wearable consumer electronics like smart watches.

The engine of future OLED Display Innovation is inkjet printing—a proven technology,
long established in graphics arts and now-re-imagined as a manufacturing solution for OLED mass production.
When optimized with novel hardware and process techniques, and
leveraging new ink innovations by OLED materials companies,
inkjet printing enables flexible and large-scale OLEDs to be manufactured over broad areas and
in high volume—with higher yields and lower production costs.

Investors
»Samsung Venture Invest

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~ Sinovia Technologies

»Sinovia Technologies

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~ GetChip

»getchip.com
ξ the world's first $9 computer

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~ Facebook

»www.facebook.com

Facebook released design for souped-up artificial intelligence server, 'Big Sur'
Facebook is releasing the hardware design for a server
it uses to train artificial intelligence software,
allowing other companies exploring AI to build similar systems.

Code-named Big Sur, Facebook uses the server to run its machine learning programs,
a type of AI software that "learns" and gets better at tasks over time.

It's contributing Big Sur to the Open Compute Project,
which it set up to let companies share designs for new hardware.

One common use for machine learning is image recognition,
where a software program studies a photo or video to identify the objects in the frame.
But it's being applied to all kinds of large data sets, to spot things like email spam and credit card fraud.

Facebook pushing hard at AI, which helps to build smarter online services.
This is the first time it's released AI hardware.

Big Sur relies heavily on GPUs,
which are often more efficient than CPUs for machine learning tasks.
The server can have as many as eight high-performance GPUs
that each consume up to 300 watts, and can be configured in a variety of ways via PCIe.

GPU-based system claimed to be twice as fast as its previous generation of hardware.
Distributing training across eight GPUs allows to scale the size and
speed of networks by another factor of two.

Big Sur does NOT require special cooling or other unique infrastructure.
Images show a large airflow unit inside the server that presumably contains fans that blow cool air across the components.
Facebook says it can use the servers in its air-cooled data centers,
which avoid industrial cooling systems to keep costs down.

Like a lot of other Open Compute hardware, it's designed to be as simple as possible.
OCP members are fond of talking about the "gratuitous differentiation"
that server vendors put in their products, which can drive up costs and make it harder to manage equipment from different vendors.

They removed the components that don't get used very much, and
components that fail relatively frequently — such as hard drives and DIMMs —
can now be removed and replaced in a few seconds.
All the handles and levers that technicians are supposed to touch are colored green,
so the machines can be serviced quickly, and
even the motherboard can be removed within a minute.
Big Sur is almost entirely tool-less --the CPU heat sinks are the only things you need a screwdriver for.

It's not sharing the design to be altruistic:
Facebook hopes others will try out the hardware and suggest improvements.
And if other big companies ask server makers to build their own Big Sur systems,
the economies of scale should help drive costs down for Facebook.

Machine learning has come to the fore lately for a couple of reasons.
One is that large data sets used to train the systems have become publicly available.
The other is that powerful computers have gotten affordable enough to do some impressive AI work.

Facebook pointed to software it developed already
that can read stories, answer questions about an image, play games, and learn tasks by observing examples.
They realized that truly tackling these problems at scale would require to design own systems.

Big Sur, named after a stretch of picturesque California coastline,
uses GPUs from Nvidia, including its Tesla Accelerated Computing Platform.

Facebook said it will to triple its investment in GPUs
so that it can bring machine learning to more of its services.

Big Sur as fast as previous generation, which means one can train twice as fast and
explore networks twice as large.
Distributing training across eight GPUs allows to scale the size and speed of networks by another factor of two."

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~ Movidius

»Movidius
ξ Vision Processing Unit (VPU) with Interfaces, hardware accelators, arrays of vector processors and two RISC CPU
ξ machine vision and visual awareness in severely power-constrained environments
ξ acquired by Intel
ξ DJI’s Spark uses Myriad 2 VPU for onboard computer vision processing and deep learning algorithms

»
ξ the third generation and most advanced VPU from Movidius™, and Intel® company
ξ is the first VPU to feature the Neural Compute Engine
ξ a dedicated hardware accelerator for deep neural network inferences
ξ Neural Compute Engine in conjunction with the 16 powerful SHAVE cores
ξ and an ultra-high throughput intelligent memory fabric
ξ makes Myriad X the industry leader for on-device deep neural networks and computer vision applications
ξ has received additional upgrades to imaging and vision engines
ξ including additional programmable SHAVE cores, upgraded and expanded vision accelerators, and
ξ a new native 4K ISP pipeline with support for up to 8 HD sensors connecting directly to the VPU
ξ is programmable via the Myriad Development Kit (MDK)
ξ which includes all necessary development tools, frameworks and APIs
ξ to implement custom vision, imaging and deep neural network workloads on the chip

»Movidius™ Neural Compute Stick (NCS)
ξ you can use to learn AI programming
ξ powered by Movidius™ Vision Processing Unit (VPU)
ξ that can be found in millions of smart security cameras, gesture controlled drones, industrial machine vision equipment
ξ Caffe framework
ξ USB 3.0 Type-A
ξ 0° - 40° C
ξ x86_64 computer running Ubuntu 16.04

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~ JPL NASA

»JPL NASA

Pop-Up Flat Folding Explorer Robot (PUFFER)
ξ inspired by origami
ξ lightweight design
ξ capable of flattening itself, tucking in its wheels and crawling into places rovers can't fit
ξ tested in a range of rugged terrains
ξ designed to skitter up 45-degree slopes, investigate overhangs and even drop into pits or craters
ξ can do parallel science with a rover
ξ JPL hope to see the bot rolling across the sands of Mars
ξ potential for fields like geology
ξ body originated by Karras, UC Berkeley's Biomimetic Millisystem Lab
ξ circuit board includes both the electronics and the body
ξ Christine Fuller, a JPL mechanical engineer worked on PUFFER's structure
ξ JPL's Kalind Carpenter, who specializes in robotic mobility, made four wheels for the folding bot on a 3-D printer
ξ wheels can also be folded over the main body
ξ team partnered with the Biomimetic Millisystems Lab, which developed a "skittering walk"
ξ Distant Focus Corporation, Champaign, Illinois, provided a high-resolution microimager
ξ runs off Bluetooth and can be controlled remotely
ξ includes many Mars-compatible materials in its construction
ξ body is wrapped in Nomex, a strong textile used in the air bags
ξ that cushioned NASA's Spirit and Opportunity rovers when they touched down on Mars
ξ Pioneer Circuits, Santa Ana, California, helped integrate the Nomex into the folding circuit boards

Development of PUFFER
ξ add instruments to allow it to sample water for organic material
ξ or a spectrometer to study the chemical makeup of its environment
ξ making PUFFER smarter
ξ add autonomy
ξ allow a swarm of PUFFERs to conduct science as a mobile team
ξ project is part of »Game Changing Development (GCD) program

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~ Palomar Displays

»Palomar Displays
ξ bi-ocular night vision thermal imaging cameras for military tanks
ξ composed of two separate eye pieces, but only one optical channel,
ξ thus delivering one image to both eyes at the same time

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~ Cerebras Systems

»Cerebras Systems
ξ developing custom hardware system
ξ creating high-performance linear-algebra and machine-learning kernels
ξ using TensorFlow and other frameworks to train deep networks on Cerebras software and hardware

From: Paivi MayHill sec@yourdragonxi.com
Small&Smart (S&S) is a private California company interested to collaborate with Cerebras Systems (CS)
developing unmanned and autonomous systems (UAS) for network-centric operations at remote and demanding theaters.

S&S is also interested to integrate our autonomic software by software technology with CS's AI products.

Questions:
1) will CS hardware be suitable for the environments described above ?
2) would it be possible to integrate our automatic and autonomous software generating technology with CS platform?

Thanks in advance,
Paivi MayHill
Secretary of S&S
www.dragonxi.com

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~ Royole

»Royole

FlexPai Developer Model
The world’s first commercial foldable smartphone,
a combination of mobile phone and tablet,
with Royole’s 2nd Gen, ultrathin, fully flexible display.
Disrupting consumers’ traditional concept of a smartphone,
the unit can be used either folded or unfolded, giving it the portability of a smartphone
plus the screen size of a high-definition tablet.
FlexPai can be folded from 0 to 180 degrees.
Say goodbye to rigid surfaces;
FlexPai will completely change your perception of a traditional mobile phone and
the need to own multiple mobile devices.
Unfolded, FlexPai provides a 7.8” large, tablet sized, full color display screen
that easily fits into your pocket.
Never sacrifice a large screen to enjoy mobility again, with FlexPai you have the best of both.

Order fulfillment will start in late December, 2018.

7.8" tablet sized, full color flexible display with 4:3 aspect ratio and 1920 x 1440 resolution
Capable of folding up to 180 degrees
When folded, three screens (primary, secondary and edge) are available
with the following aspect ratios and resolutions
(primary = 16:9/810x1440, secondary = 18:9/720x1440, edge = 21:6/390x1440)
Work or play without interruption;
FlexPai’s edge screen displays notifications for incoming calls, emails, and messages.
Unique Water OS is intuitive and provides unparalleled viewing flexibility
Includes two quality cameras with 20 and 16 megapixels
that can be bent to capture objects at unique angles
When folded, incoming calls or photos can be conveniently taken from either side

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Small & Smart Inc reserves rights to change this document without any notice
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